From: Ralph Ronnquist <ralph.ronnquist@gmail.com>
Date: Mon, 18 Jul 2022 06:14:12 +0000 (+1000)
Subject: reorg fixup
X-Git-Url: https://git.rrq.au/?a=commitdiff_plain;h=28dc66c5290db50386c8aeedf33cc4645316cdd6;p=rrq%2Frrqmisc.git

reorg fixup
---

diff --git a/socket-sniff/Makefile b/socket-sniff/Makefile
index e86108f..9888195 100644
--- a/socket-sniff/Makefile
+++ b/socket-sniff/Makefile
@@ -1,11 +1,12 @@
 default: socket-sniff
 
-RRQLIBS = typing vector
+RRQLIBS = vector typing
 INCDIRS = $(addprefix -I../,$(RRQLIBS))
+$(foreach L,$(RRQLIBS),$(eval LDLIBS += -L../$L -lrrq$L))
 
 CFLAGS = -Wall $(INCDIRS)
 CFLAGS += -g -fmax-errors=1
-LDLIBS = -L../vector -lvector -lm
+LDLIBS += -lm
 
 .INTERMEDIATE: socket-sniff.o
 
diff --git a/tests/Makefile b/tests/Makefile
index ab5fcc2..aa2f5eb 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -4,12 +4,13 @@ BIN = ${SRC:.c=}
 
 default: ${BIN}
 
-RRQLIBS = typing vector logic
+RRQLIBS = logic vector typing
 INCDIRS = $(addprefix -I../,$(RRQLIBS))
+$(foreach L,$(RRQLIBS),$(eval LDLIBS += -L../$L -lrrq$L))
 
 CFLAGS = -Wall $(INCDIRS)
 CFLAGS += -g -fmax-errors=1
-LDLIBS = -L../vector -lvector -lm
+LDLIBS += -lm
 
 .INTERMEDIATE: ${OBJ}