reorg fixup

[rrq/rrqmisc.git] / tests / Makefile

diff --git a/tests/Makefile b/tests/Makefile
index ab5fcc2811b59aa9886124acf6449e0a17cfce49..aa2f5eb4a54ea491d4bec66145a19f6cdfa5ca75 100644 (file)
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -4,12 +4,13 @@ BIN = ${SRC:.c=}
 
 default: ${BIN}
 
-RRQLIBS = typing vector logic
+RRQLIBS = logic vector typing
 INCDIRS = $(addprefix -I../,$(RRQLIBS))
+$(foreach L,$(RRQLIBS),$(eval LDLIBS += -L../$L -lrrq$L))
 
 CFLAGS = -Wall $(INCDIRS)
 CFLAGS += -g -fmax-errors=1
-LDLIBS = -L../vector -lvector -lm
+LDLIBS += -lm
 
 .INTERMEDIATE: ${OBJ}